GTL2002DP |
RFQ for GTL2002DP Required Field |
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| Technical/Catalog Information | GTL2002DP,118 |
| Vendor | NXP Semiconductors |
| Category | Integrated Circuits (ICs) |
| Package / Case | 8-TSSOP |
| Packaging | Tape & Reel (TR) |
| Input Type | Voltage |
| Output Type | Voltage |
| Supply Voltage | 3 V ~ 3.6 V |
| Data Rate | - |
| Number of Channels | 2 |
| Operating Temperature | -40°C ~ 85°C |
| Drawing Number | 568; SOT505; ; |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | GTL2002DP,118 GTL2002DP,118 568 4231 2 ND 56842312ND 568-4231-2 |
| Product | Manufacturers | Pack | D/C |
| GTL2002DP | - | - | 08+ |
The Gunning Transceiver Logic - Transceiver Voltage Clamps(GTLTVC) provide high-speed voltage translation with lowON-state resistance and minimal propagation delay. The GTL2002provides 2 NMOS pass transistors (Sn and Dn) with a common gate(GREF) and a reference transistor (SREF and DREF). The deviceallows bi-directional voltage translations between 1.0 V and 5.0 Vwithout use of a direction pin.
When the Sn or Dn port is LOW the clamp is in the ON-state and alow resistance connection exists between the Sn and Dn ports.Assuming the higher voltage is on the Dn port, when the Dn port ishigh, the voltage on the Sn port is limited to the voltage set by thereference transistor (SREF). When the Sn port is high, the Dn port ispulled to VCC by the pull up resistors. This functionality allows aseamless translation between higher and lower voltages selected bythe user, without the need for directional control.
All transistors have the same electrical characteristics and there isminimal deviation from one output to another in voltage orpropagation delay. This is a benefit over discrete transistor voltagetranslation solutions, since the fabrication of the transistors issymmetrical. Because all transistors in the device are identical,SREF and DREF can be located on any of the other two matchedSn/Dn transistors, allowing for easier board layout. The translator'stransistors provides excellent ESD protection to lower voltagedevices and at the same time protect less ESD resistant devices.
Typical Application |
Features |
| •Any application that requires bi-directional or unidirectional voltage level translation from any voltage between 1.0 V and 5.0 V to any voltage between 1.0 V and 5.0 V• The open drain construction with no direction pin is ideal for bi-directional low voltage (e.g., 1.0 V, 1.2 V, 1.5 V, or 1.8 V)processor I 2C port translation to the normal 3.3 V or 5.0 V I2C-bus signal levels or GTL/GTL+ translation to LVTTL/TTL signal levels. | • 2-bit bi-directional low voltage translator• Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V buses which allows direct interface with GTL, GTL+, LVTTL/TTL and 5 V CMOS levels• Provides bi-directional voltage translation with no direction pin• Low 6.5 Ω RDSON resistance between input and output pins(Sn/Dn)• Supports hot insertion• No power supply required - Will not latch up• 5 V tolerant inputs• Low stand-by current• Flow-through pinout for ease of printed circuit board trace routing• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V per JESD22-C101• Packages offered: SO8, TSSOP8 (MSOP8), VSSOP8 |
